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SEMI International Standards
Standards Locale: Japan
Committee: Silicon Wafer
Place of Meeting: SEMI Japan Office, Tokyo, Japan
Date of Meeting: 03/08/2013
Meeting End Date: 03/08/2013
Recording SEMI Standards Staff: Hirofumi Kanno
CER Posted to Web: 03/18/2013
Leadership Changes

Group
Previous Leader
New Leader
International Polished Wafer Task ForceTakao Takenaka / Consultant *Koji Izunome / GlobalWafers Japan
Kazuhito Matsukawa / Renesas ** Electronics
Koji Izunome / GlobalWafers Japan
International Annealed Wafer Task ForceKoji Izunome / GlobalWafers JapanKoji Araki / GlobalWafers Japan***

* Takao Takenaka (Consultant) stepped down as the co-leader of the International Polished Wafer Task Force.
** Kazuhito Matsukawa (Renesas Electronics) stepped down as the co-chair of the International Polished Wafer Task Force.
*** Koji Araki (GlobalWafers Japan) newly appointed as a co-chair of the International Annealed Wafer Task Force instead of Koji Izunome (GlobalWafer Japan) who stepped down.

TC Chapter Structure Changes
None.

Ballot Results
None.

Ratification Ballot Results
None.

Activities Approved by the GCS between meetings of TC Chapter meeting
None.

Authorized Activities
None.

Authorized Ballots
None.

SNARF(s) Granted a One-Year Extension
None.

SNARF(s) Cancelled
None.

Standard(s) to receive Inactive Status
None.

Special Announcements of the Committee (Workshops, Programs, etc.)
None.

Next Meeting

The next Japan Silicon Wafer Committee meeting is held on Friday, June 7, 2013, 1:00p.m. - 5:00p.m. at JPR Bldg. conference room 1, SEMI Japan Office, Tokyo, Japan.









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